Hi Vikas,
I just built the design again (the one that Brian attached earlier) using Quartus Pro 18.1.1 and here is the message I get when running the assembler ->
Warning(115005): Unlicensed IP: "Low Speed Viterbi Decoder(6AF7 0038)"
Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/netlist.model"
Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/names.model"
Warning(115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.
Warning(115005): Unlicensed IP: "Low Speed Viterbi Decoder(6AF7 0038)"
Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/netlist.model"
Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/names.model"
Steve