Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

VIP, Parallel processing

We have a working design as follows: CVI -> CSC -> DEI -> FB -> Scaler -> CR -> Interlacer -> CVO This works fine for video up to 1080P input/output. The VIP is run at 160MHz. N...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thanks for your input Jake.

Basically the hardware is in the field so we have to make do with what we have. We did some evaluations early on and it seemed like we had things working but then the design changed, features were added, ... the usual.

I sat with our FAE and we tweaked the tools to get the timing as good as we could. Although I'll certainly revisit this again. He's coming in tomorrow to help us get 10.0 up and running. We're also hoping the new tools may get us over this hump. Also - the User Guide lists some Fmax numbers for the various IP - we're exceeding those numbers by quite a bit on several of the IP.

But if that doesn't get us there then I'll probably have to go with your suggestion on the Frame Buffer. Though I'm not looking forward to that.

Thanks again.