Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

VIP FrameBuffer - How do you think it is accessing the SDRAM?

Hi! I am thinking about FrameBuffer Core Altera provides. In the VIP User Guide it is explained clearly, how the FB is working, with the concepts of dual and triple buffering. What I don't...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi Kevin, I am not thinking that there is a major bug in the code. I have developed that with modelsim and got it worked out according to the avalon specifications.

You are mentioning to use burst transfers. I am not doing this, because in the documentation of the SDRAM Controller Core it is just mentioned, that it supports pipelined access. I looked in the documentation that I have got again and did not find any hint for bursts, why do you think it supports it? Have you got any source?

Thanks