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I think there must be some significant changes to the CVI block in 9.1; it obviously doesn't like my input signals any more.
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The change between 9.0 and 9.1 was that the Clocked Video Input (CVI) now checks the line lengths, both total and non-hblank, throughout the whole frame, not just during the active picture. I've seen DVI inputs where during the vertical blanking the timing on the hsyncs changes, this causes the CVI to detect a different resolution. The way to check if you have such a DVI input is to use signaltap to count the number of clock cycles between the falling and rising edges of the hsync signal during the vertical blanking.
The CVI needs changing to only check the active picture length during non-vertical blanking and the total line length during the whole frame. I'll take a look a what modifications you need to make to do this.
Honored Contributor
