VHDL-Code with Avalon Bus Interface-/ and VHDL-Video-System-Interface-Ports

you need an avs_address, avs_read, avs_write signals. Your address will be however many spots you need, which sounds like only 1, so it can be a std_logic rather than a std_logic_vector. Then when the avs_write is strobed you look at the address to see who you are writing to. Same for the read. your reg.h file is generally correct, but can be simplified:

# define IORD_IME_AVALONE_XY_DETECTOR_DATA() IORD(XY_DETECTOR_BASE,0)
# define IOWR_IME_AVALONE_XY_DETECTOR_DATA(data) IOWR(XY_DETECTOR_BASE,0, (data))
# define IORD_IME_AVALONE_XY_DETECTOR_CONTROL() IORD(XY_DETECTOR_BASE,1)
# define IOWR_IME_AVALONE_XY_DETECTOR_CONTROL(data) IOWR(XY_DETECTOR_BASE,1, (data))

Not sure if you want 1 or 4 for the offset of the second one. I have never really used the IO_CALC_ADDRESS_NATIVE functions as I always use 32-bit slaves with 32-bit masters, so the offset is always 4.

Help?

Kevin

Thanks Kevin, this help me well.

But now I have another problem:

Here the complete vhdl-code:

LIBRARY ieee;

USE ieee.std_logic_1164.all;

USE ieee.std_logic_arith.all;

USE ieee.numeric_std.all;

ENTITY ime_avalon_xy_detector IS

PORT

(

-- Avalon Conduit to VHDL_Detector Clock Interface

coe_iVGA_CLK : in std_logic;

coe_iRST_N : in std_logic;

-- Avalon Conduit to VHDL_Detector IN-Ports

coe_iVGA_R : in std_logic_vector(9 downto 0);

coe_iVGA_VS : in std_logic;

-- Avalon Clock Interface

csi_clk : in std_logic;

csi_rst_n : in std_logic;

-- Avalon-MM Interface / Slave Port

avs_address : in std_logic;

avs_write : in std_logic;

avs_writedata : in std_logic_vector(31 downto 0);

avs_read : in std_logic;

avs_readdata : out std_logic_vector(31 downto 0)

);

END ENTITY ime_avalon_xy_detector;

--

ARCHITECTURE rtl OF ime_avalon_xy_detector IS

SIGNAL coordinate_wr : std_logic_vector(31 downto 0);

SIGNAL coordinate_rd : std_logic_vector(31 downto 0);

SIGNAL x : std_logic_vector(15 downto 0);

SIGNAL y : std_logic_vector(15 downto 0);

SIGNAL dat_0 : integer range 0 to 1000000 := 100000; -- 0x186A0

SIGNAL dat_1 : integer range 0 to 1000000 := 111111; -- 0x1B207

BEGIN

write_proc: process(csi_clk, csi_rst_n)

begin

if csi_rst_n = '0' then

coordinate_wr <= (others => '0');

x <= (others => '0');

y <= (others => '0');

elsif rising_edge(csi_clk) then

if avs_write = '1' then

coordinate_wr <= avs_writedata;

end if;

end if;

end process write_proc;

read_proc: process(csi_clk, csi_rst_n)

begin

if csi_rst_n = '0' then

coordinate_rd <= (others => '0');

avs_readdata <= (others => '0');

x <= (others => '0');

y <= (others => '0');

elsif rising_edge(csi_clk) then

coordinate_rd <= coordinate_wr;

if avs_address = '0'then

coordinate_rd <= std_logic_vector(to_unsigned(dat_1, 32));

elsif avs_address = '1' then

coordinate_rd <= std_logic_vector(to_unsigned(dat_0, 32));

end if;

if avs_read = '1' then

avs_readdata <= coordinate_rd;

end if;

end if;

end process read_proc;

END ARCHITECTURE rtl;

in this case the NiosII can not load the prgram in ram. Here the messagge:

Verifying 00080000 ( 0%)

Verify failed between address 0x80000 and 0x8D0DB

Leaving target processor paused

but when I change the part with the avs_address as below:

if avs_address = '0'then

coordinate_rd <= std_logic_vector(to_unsigned(dat_0, 32));

elsif avs_address = '1' then

coordinate_rd <= std_logic_vector(to_unsigned(dat_1, 32));

end if;

the NiosII will work good.

Thats very strange.....

Have you any idea???????

here is the code in NiosII:

# include "NiosII_Camera_Tracking.h"

int main(void)

{

alt_u32 daten= 0xF0F0F0F0;

IOWR_IME_AVALON_XY_DETECTOR_DATA(XY_DETECTOR_BASE, daten);

printf("Der gelesene Wert ist: %x\n", IORD_IME_AVALON_XY_DETECTOR_DATA(XY_DETECTOR_BASE));

printf("Der gelesene Wert ist: %x\n", IORD_IME_AVALON_XY_DETECTOR_CONTROL(XY_DETECTOR_BASE));

printf("Hello World\n");

}

Where do you set the value of dat0 and dat1? or are you just writing some temp code for now that keeps them constant?

Where are you setting x and y? i am surprised what you have compiled because you set them in two different process statements.

Also, the readdata is most likely 1 clock off, as there is a 1 clock delay from when coordinate_rd is set the the correct address value and then another clock till when readdata is set. I would eliminate the coordinate_rd register and just say:

if (avs_read = '1') then
    if (avs_address = '0') then
        coordinate_rd <= std_logic_vector(to_unsigned(dat_0, 32));
    else
        coordinate_rd <= std_logic_vector(to_unsigned(dat_1, 32));
    end if;
end if; 

Also, is there a need to use integers rather than unsigned type? in general it is better to use unsigned because you know the size of the variable.

Besides that, no clue why the change in what you return will change the program from being able to load. I could see the your code not working correctly, but i don't really see why it would fail to load the program into memory. Maybe your *_hw.tcl file is wrong and messes up the bus transactions. You are not trying to load program memory into this hw block i assume, but that would cause a problem.

thanks you from help. But now I make the avalon bus otherwise.

I changed the reg.h file. I use only a Register with only a address. when the x/y coordinate are ready to read, I send a Interrupt via coe_oCOORD_IRQ to PIO-Interface. This Methode works well.

But when I incontre other problems, I post it for any good suggest from you...

Antonio