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Altera_Forum
Honored Contributor
Honored ContributorVHDL-Code with Avalon Bus Interface-/ and VHDL-Video-System-Interface-Ports
Hello I provided the following ENTITY. Can I actually provide a IP, which some haven connectivity with the Avalon bus, as well as haven as down descriptive for the VHDL_Detector, which is not c...
Altera_ForumHonored Contributor
Honored Contributoranother question:
How I can differentiate in the vhdl-file in where Signal I wont write or read, when I use two register for DATA and CONTROL specificate in the reg.h? I have only a avs_writedata in the vhdl-file....:confused:
