VHDL-Code with Avalon Bus Interface-/ and VHDL-Video-System-Interface-Ports

do you mean so for example:

dataavailable = IORD_IME_AVALON_XY_DETECTOR_CONTROL(XY_DETECTOR_BASE, 1)

if(dataavailable)

{

coordinate= IORD_IME_AVALON_XY_DETECTOR_DATA(XY_DETECTOR_BASE, 0)

}

and the reg.h:

# define IOADDR_IME_AVALON_XY_DETECTOR_DATA(base, offset) __IO_CALC_ADDRESS_NATIVE(base, 0)

# define IOWR_IME_AVALON_XY_DETECTOR_DATA(base, offset, data) IOWR(base, 0, data)

# define IORD_IME_AVALON_XY_DETECTOR_DATA(base, offset) IORD(base, 0)

# define IOADDR_IME_AVALON_XY_DETECTOR_CONTROL(base, offset) __IO_CALC_ADDRESS_NATIVE(base, 1)

# define IOWR_IME_AVALON_XY_DETECTOR_CONTROL(base, offset, data) IOWR(base, 1, data)

# define IORD_IME_AVALON_XY_DETECTOR_CONTROL(base, offset) IORD(base, 1)

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here MSK and any OFST

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Antonio