Forum Discussion
CosmoKramer
Occasional Contributor
1 year agousing emif ip amm interface
Hello, We are using quartus 23.4 and seeing discrepancy in the polarity of ctrl_amm signal on the emif ip between documentation and the example design. As per simulation of the example design - r...
CosmoKramer
Occasional Contributor
1 year agoHello,
I mean the amm_ready signall in the ctrl_amm inerface mentioned in the section 4.1.1.15 of this document - ug-ag-emi-683216-780962.pdf
Here is the link - https://www.intel.com/content/www/us/en/docs/programmable/683216/23-2-2-7-1/ctrl-amm-for-ddr4.html
code for emif_controller.v in the ip folder:
output wire amm_ready_0, // ctrl_amm_0.waitrequest_n, Wait-request is asserted when controller is busy
code for emif_controller.v in the example design:
output wire amm_ready_0, // ctrl_amm_0.waitrequest_n, Wait-request is asserted when controller is busy
the comment and user guide are conflicting.
Please let me know which one is correct and what is that correct polarity?
thank you.