Forum Discussion
Altera_Forum
Honored Contributor
8 years agoThe mechanism to generate interrupt in Avalon-MM PCIe DMA IP is same as the Avalon-MM 64/128bit Hard IP (non-DMA) when this IP is configured properly for sending the required interrupt.
However, Avalon-MM PCIe DMA IP version doesn't expose the RxmIrq port, users might need to use Mailbox to generate MSI interrupt. Writing A2P_Mailbox to send MSI to far-end with the AvMM DMA PCIe IP. (This message was posted on behalf of Intel Corporation)