New Contributor
Regular ContributorHi Antoine,
This message indicates that the specified inclk port of the specified Clock Control Block is driven by the specified illegal source. When the clkselect port is used, the inclk ports of a Clock Control Block must only be driven by clock pins or PLL clock outputs. The inclk[0] and inclk[1] need to be driven by pins and inclk[2] and inclk[3] need to be driven by a PLL output. In this case, you have to modify the design so that inclk port of the specified Clock Control Block is driven by the specified legal sources.
Thanks
Best regards,
KhaiY
New ContributorHi,
Thanks @KhaiChein_Y_Intel for the answer.
I tried to use a PLL, whose the input pin is my internal oscillator.
However, i still have an error message :
Error (15065): Clock input port inclk[0] of PLL "pll:pll_inst|altpll:altpll_component|pll_altpll:auto_generated|pll1" must be driven by a non-inverted input pin or another PLL, optionally through a Clock Control block
Does it mean I only can feed my PLL with an external clock signal through a non inverted input pin ?
Is there really no way to use the internal oscillator as a PLL input ?
Regards,
Antoine
