Forum Discussion
Error when simulating F-tile Ethernet example design
When running "run_vcsmx.sh" following set of errors occurs
Just one example
Error-[URMI] Unresolved modules
../ex_200G/sim/../../hardware_test_design/support_logic/eth_f_hw_auto_tiles.sv, 2655
"intfc_m_hdpldadapt_avmm1_mux #(.topology("UX16E400GPTP_XX_DISABLED_XX_DISABLED"), .maib_id(0), .num_ip_on_intfc_00(2), .system_pll_ip_index_on_intfc_00(1), .num_ip_on_intfc_01(2), .system_pll_ip_index_on_intfc_01(1)) z1577b_x0_y0_n0__avmm1_0( .pld_avmm1_busy_real (z1577b_x0_y0_n0__avmm1_0__pld_avmm1_busy_real), .pld_avmm1_clk_rowclk_real (z1577b_x0_y0_n0__avmm1_0__pld_avmm1_clk_rowclk_real), .pld_avmm1_cmdfifo_wr_full_real (z1577b_x0_y0_n0__avmm1_0__pld_avmm1_cmdfifo_wr_full_real), .pld_avmm1_cmdfifo_wr_pfull_real (z1577b_x0_y0_n0__avmm1_0__pld_avmm1_cmdfifo_wr_pfull_real), .pld_avmm1_read_real (z1577b_x0_y0_n0__avmm1_0__pld_avmm1_read_real), .pld_avmm1_readdata_real (z1577b_x0_y0_n0__avmm1_0__pld_avmm1_readdata_real), .pld_avmm1_readdatavalid_rea ... "
Module definition of above instance is not found in the design.
eth_f_hw_auto_tiles.sv is a 36 MB sv-file, making debugging of this quite tedious. I've only followed the design example user guide which states the script should be able to run out of the box.
3 Replies
- paveetirrasrie_Altera
Frequent Contributor
Hello,
May I know what is your IP configuration?
Kindly share with me the Quartus version and device details. And is the simulation files were generated from example design?
Regards,
Pavee
- paveetirrasrie_Altera
Frequent Contributor
Hello,
Good day to you.
Any update based on my last reply?
Regards,
Pavee
- paveetirrasrie_Altera
Frequent Contributor
Hello,
We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support.
If you have a new question, feel free to open a new thread to get the support from Altera experts.
Otherwise, the community users will continue to help you on this thread.
Thank you.