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Altera_Forum
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13 years ago

use descriptor chain in SGDMA

Hi all

My current goal is to use SGDMA (ST-to-MM) to transfer video data to a memory.

Later on, I'll replace the memory by PCIE IP.

My problem is how to use descriptor chain in SGDMA.

In Qsys, the descriptor read and write signals of SGDMA are connected to an on-chip memory (mem A).

The Avalon-ST sink is connected to a test pattern generator.

The m_write signal which is an Avalon-MM master is connected to another on-chip memory (mem B ).

Basically, my idea is to transfer data from test pattern generator to mem B.

In Nios II, I write a simple C program doing the following things:

1) open SGDMA device with the function "alt_avalon_sgdma_open"

2) reset SGDMA with the macro IOWR_ALTERA_AVALON_SGDMA_CONTROL

3) register callback function with the function "alt_avalon_sgdma_register_callback"

4) write descriptor with the function "alt_avalon_sgdma_construct_stream_to_mem_desc"


alt_avalon_sgdma_construct_stream_to_mem_desc(&sgdma_desc, &sgdma_desc, buf, 0, 0);

5) start sgdma transfer by calling the function "alt_avalon_sgdma_do_async_transfer"

This simple program works well.

I see a control packet in the avalon-st interface and this packet is copied to the mem B successfully.

However, if I try to add the second descriptor, the program get stuck.


alt_avalon_sgdma_construct_stream_to_mem_desc(&sgdma_desc, &sgdma_desc, buf, 0, 0);
alt_avalon_sgdma_construct_stream_to_mem_desc(&sgdma_desc, &sgdma_desc, buf2, 0, 0);

My program seems to be trapped when I call "alt_avalon_sgdma_construct_stream_to_mem_desc" twice.

Does anyone know how to use descriptor chain in SGDMA correctly?

Thanks.

19 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Hi dsl

    Thank you for your reply.

    I modify my declaration according to your suggestion.

    
    alt_u32 __attribute__((aligned(32))) ctrl_buf;
    alt_u32 __attribute__((aligned(32))) video_buf;
    

    I've also checked my NiosII CPU setting and found that the data cache line size is 32 bytes.

    However, in my experiment, the data in video_buf after SGDMA transfer are not completely correct...
  • Altera_Forum's avatar
    Altera_Forum
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    the align attribute will ensure the different buffers will not end up o the same cache line, but there could still be some parts of video_buf that are cached and you can get the wrong contents.

    Try to call
    alt_dcache_flush ((void*)video_buff,769*sizeof(alt_u32));
    before the SGDMA transfer. This will write down the cache contents to video_buff, but most importantly will invalidate the cache for this area. That way you will be sure the cache won't interfere with the data.

    AFAIK Altera doesn't provide a macro to just invalidate the cache without flushing it, even if the instruction exists in assembly.
  • Altera_Forum's avatar
    Altera_Forum
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    Last time I looked I didn't see an instruction to invalidate a cache line without writing it out - rather an ommision.

    I also remember someone porting NetBSD saying that there was a missing cache op - but that might have been a different one!
  • Altera_Forum's avatar
    Altera_Forum
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    The descriptions of the cache op instructions aren't that clear either.

    A missing op is the one to mark a line valid without reading from memory.
  • Altera_Forum's avatar
    Altera_Forum
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    Can anyone of you post a sample code for sgdma, to check data transfer between onchip to sdram.

    I am a newbie and trying to figure out how can it be done, but I am unable to do it.
  • Altera_Forum's avatar
    Altera_Forum
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    Hi Yufu,

    I face the problem to create a descriptor chain to receive data from network.

    could you help me to solve the problem.

    Regards,

    Hitesh
  • Altera_Forum's avatar
    Altera_Forum
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    Hi Hitesh,

    I am now using modular SGDMA from Altera Wiki for my current project.

    So I may not able to help you in detail.

    You may check my attached zip file as an SGDMA example code.

    I'm not sure whether the example code is working but I was studying this code to understand Altera SGDMA.
  • Altera_Forum's avatar
    Altera_Forum
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    Hi all,

    I am trying to make an embedded device which will capture ethernet packets and copy to DDR through PCIe interface and vice versa . As a starting step, I am trying to develop codes on Cyclone V development board with NIOS gen 2 core. As I am on a learning phase I request all to share your knowledge on how should I proceed with my development. Please suggest any good articles or documentation on similar topics or reference examples. I am working on Altera 15.0.0.145 sdk. Any help would be well appreciated.