Honored ContributorHello
I am using the clocked video output core that will be connected to an LCD screen which needs from specification a pixel clock of 9 MHZ . I couldn't find out from the core such a clock , How can i configure the core in a way compatible with the screen ? Is the pixel clock related to the vid_clk that is inout to the CVO core ? Thanks for any help
Honored ContributorThe CVO does not generate the pixel clock. The pixel clock is an input to the CVO and the CVO will synchronize it's outputs to this clock.
Honored ContributorI have a similar requirement as the OP. Is the pixel clock simply passed from one IP block to another from the Clocked Video Input? Is the clock output of the CVI the clock that is on the input signal or is it generated by the CVI? If it is simply passed from the video decoder, I might have some troubles interfacing to my display as the clock is also limited to 9MHz.
Honored ContributorI made you a screen grab. The 40Mhz clock is produced by a PLL.
