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Altera_Forum's avatar
Altera_Forum
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14 years ago

TSE_MAC error

Hello all:

I'm building a cyclone III custom board integrating a GigabitEthernet interface. In SOPC builder I have the TSEMAC connected to a SGDMA_TX and a SGDMA_RX. When running the simple_socket_server example I'm facing the following issue:

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triple_speed_ethernet_init 0

prep_tse_mac 0

your ethernet mac address is 00:07:ed:ff:8f:11

prepped 1 interface, initializing...

[tse_mac_init]

tse_mac_init 0

info : tse mac 0 found at address 0x00000400

info : phy marvell 88e1111 found at phy address 0x12 of mac group[0]

info : phy[0.0] - automatically mapped to tse_mac_device[0]

info : phy[0.0] - restart auto-negotiation, checking phy link...

info : phy[0.0] - auto-negotiation passed

info : phy[0.0] - checking link...

info : phy[0.0] - link established

info : phy[0.0] - speed = 1000, duplex = full

ok, x=1, cmd_config=0x00000000

mac post-initialization: cmd_config=0x0400020b

[tse_sgdma_read_init] rx descriptor chain desc (1 depth) created

mctest init called

ip address of et1 : 192.168.8.220

created "inet main" task (prio: 2)

created "clock tick" task (prio: 3)

no free buffers for rx

no free buffers for rx

no free buffers for rx

no free buffers for rx

and so on

Is it a HW related problem or a software related one? Could you please give any advice on a possible cause/solution?

Thanks in advance,

Luis

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    You're overflooding receive buffers. The buffer becomes full, software tries to check what packet it is and finally disables reception. FIFO overflows and You get that error.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Thanks Socrates.

    And what do you think is the cause of the error? Is it HW or SW? We don't get that message in other board designed some time ago (same schematic as this one).

    thanks,

    Luis
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    If the software is the same and You get the error to this one - then I would say it's a hardware problem. But I am pretty sure it's software issue. Well, basically, not software, but probably fpga logic if You use channels for ethernet packets in Avalon-ST interconnect.