Altera_Forum
Honored Contributor
15 years agoTSE + MARVELL + INICHE What am I missing???
Hi,
Can any of you see if i have done something stupid below: I cannot transmit anyhing. First my setup code: alt_tse_phy_profile MV88E1116R = {"Marvell 88E1116R", // MV88E1111_OUI, // OUI 0x24, // Vender Model Number 0, // Model Revision Number 0x11, // Location of Status Register 14, // Location of Speed Status 13, // Location of Duplex Status 10, // Location of Link Status &marvell_phy_cfg // Function pointer to configure Marvell PHY }; alt_tse_phy_add_profile(&MV88E1116R); alt_tse_system_mac sys_mac = {TSE_SYSTEM_MAC(TRIPLE_SPEED_ETHERNET_0)}; alt_tse_system_sgdma sys_sgdma = {TSE_SYSTEM_SGDMA(SGDMA_ETH_TX, SGDMA_ETH_RX)}; alt_tse_system_desc_mem sys_mem = {TSE_SYSTEM_DESC_MEM(RAM_DESCRIPTOR)}; alt_tse_system_shared_fifo sys_sfifo = {TSE_SYSTEM_NO_SHARED_FIFO()}; alt_tse_system_phy sys_phy = {TSE_SYSTEM_PHY(1, NULL)}; alt_tse_system_add_sys(&sys_mac, &sys_sgdma, &sys_mem, &sys_sfifo, &sys_phy ); And console............: Copyright 1996-2008 by InterNiche Technologies. All rights reserved. prep_tse_mac 0 Created "Inet main" task (Prio: 2) Your Ethernet MAC address is 01:01:20:00:00:00 prepped 1 interface, initializing... Created "clock tick" task (Prio: 3) [tse_mac_init] INFO : TSE MAC 0 found at address 0x01043000 INFO : PHY Marvell 88E1116R found at PHY address 0x01 of MAC Group[0] INFO : PHY[0.0] - Explicitly mapped to tse_mac_device[0] INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... INFO : PHY[0.0] - Auto-Negotiation PASSED INFO : PHY[0.0] - Checking link... INFO : PHY[0.0] - Link established INFO : PHY[0.0] - Speed = 1000, Duplex = Full OK, x=0, CMD_CONFIG=0x00000000 MAC post-initialization: CMD_CONFIG=0x0400020b [tse_sgdma_read_init] RX descriptor chain desc (1 depth) created mctest init called IP address of et1 : 192.168.1.234 DHCP timed out, going back to default IP address(es) Simple Socket Server starting up [sss_task] Simple Socket Server listening on port 30 Please folks, I really need to OK this hardware. Apus