Stratix4GX PCIe development board to used as root port

Thanks for getting back to me. In my application, I want to use the Altera Stratix4GX as the main rootport. I would like to feed the TLPs to it using Avalon Streaming interface which then is sent out to all other PCIe devices on the motherboard.

So in my application, the block diagram will look like as below:

Processor --> Altera Stratix4gx root port --> Root port on the motherboard --> Reset of the devices on the motherboard.

I notice that the Altera Stratic4gx root port has Base address register, That filters out only specific requests (?)

In my application I need the ability to send out any cycles from processor to the root port on the motherboard via the Stratix4GX Root port. Is that possible? I am bit confused about having BAR in root port which limits this?

Thanks for prompt response.