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Platform Designer HDL generation errors on AN 830: Intel FPGA Triple-Speed Ethernet and On-Board PHY
platform designer qsys_top.qsys generate HDL exited with errors
Error: qsys_top_error_adapter2_0.qsys_top_error_adapter2_0: Component error_adapter2 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 5 Warnings
Error: qsys_top_error_adapter2_0.qsys_top_error_adapter2_0: Component error_adapter2 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 5 Warnings
Error: qsys_top_aso_splitter_0.qsys_top_aso_splitter_0: Component aso_splitter 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 6 Warnings
Error: qsys_top_aso_splitter_0.qsys_top_aso_splitter_0: Component aso_splitter 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 6 Warnings
Error: qsys_top_eth_gen_0.qsys_top_eth_gen_0: Component eth_gen 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 6 Warnings
Error: qsys_top_eth_gen_0.qsys_top_eth_gen_0: Component eth_gen 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 6 Warnings
Error: qsys_top_st_mux_2_to_1_0.qsys_top_st_mux_2_to_1_0: Component st_mux_2_to_1 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 8 Warnings
Error: qsys_top_st_mux_2_to_1_0.qsys_top_st_mux_2_to_1_0: Component st_mux_2_to_1 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 8 Warnings
Error: eth_mon_0.eth_mon_0: Component eth_mon 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 6 Warnings
Error: eth_mon_0.eth_mon_0: Component eth_mon 1.0 not found or could not be instantiated
Error: qsys-generate failed with exit code 3: 1 Error, 6 Warnings
Hi,
I found a workaround of this problem, please unzip the attached file to get the two missing folders (crc32 & User_Logic), and then locate it at "platform" folder. After that, you should be able to generate the platform designer of this example.
Regards -SK
5 Replies
- SengKok_L_Intel
Regular Contributor
hi,
Thank you for letting us know this problem, and I can observe the same error from my site.
It look like the hw.tcl files for those customer components in this design was not included in the par file. I will contact the owner of this design to obtain those missing files. Will keep you updated.
Regards -SK
- SengKok_L_Intel
Regular Contributor
Hi,
I found a workaround of this problem, please unzip the attached file to get the two missing folders (crc32 & User_Logic), and then locate it at "platform" folder. After that, you should be able to generate the platform designer of this example.
Regards -SK
- Lorne_K_Intel
New Contributor
Thanks, SengKok.
The solution works perfectly.
- SengKok_L_Intel
Regular Contributor
For the permanent fix, we are in progress to update the PAR file in design store, and it may take some time.
Regards -SK
- SengKok_L_Intel
Regular Contributor
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