Forum Discussion
Hi Christian,
I believe these are the questions you have had, and hence I'm providing answers to each of them.
1. Is there an approximate timeline on when you will be able to obtain the updated BIOS from AMD?
The ball is in AMD's court. We are expecting closure in a few weeks.
2. Will the updated BIOS from AMD support AMD EPYC 9005/9004 Series Processors? This is what is used in our current server.
Yes, the AMD 9005/9004 support the AMD Turin architecture.
3. Did you make any modifications to the AMD Turin loaner system's BIOS to get a functional bring-up? If so, could you list the aspects you changed so that we can replicate it on our side.
No, we did not make any modifications on our side.
4. Does the CXL IP compile differently in Quartus 25.1.1 compared to 25.3? We are currently compiling on Quartus 25.1.1 using CXL IP version 1.17. From Altera's website, it appears that 1.17 is the latest IP version for CXL.
The latest version is Quartus 25.3.1 which compiles the same way as previous releases.
5. Is the cause of this bring-up failure the CXL specification compliancy of the AMD BIOS, or that the Altera CXL IP is not compliant to the CXL specification?
The Altera CXL solution trains as a 1.1 device but enumerates as a 2.0 device and hence requires an AMD BIOS modification. Altera is in the process of obtaining a compliance waiver for this functionality.