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New Contributorpcie DMA memory read & write TLP
Hi
In the context of PCIe (Peripheral Component Interconnect Express), a Memory Write (MWr) Transaction Layer Packet (TLP) is used to transfer data from the initiator (the device initiating the transaction) to the target (the device receiving the transaction).
During a Memory Write transaction, the data is indeed used in the DMA (Direct Memory Access) process. DMA allows devices to transfer data directly to and from system memory without involving the CPU. The data sent in the MWr TLP is typically stored in a specific memory location or register within the target device.
So, the data carried by the MWr TLP is not unnecessary. It serves the purpose of updating or modifying data in the target device's memory or registers, and DMA facilitates this data transfer without CPU intervention.
Regards,
Wincent_Intel
Super ContributorWhen doing DMA PCIe access controlled by the host, your host DMA driver is communicating with the device DMA descriptor controller, providing read and write transaction descriptors. You typically get completion info by an interrupt message.
Review e.g. https://www.intel.com/content/www/us/en/docs/programmable/683425/18-0.html for details.
EastGun-AThank you for answer.
One thing I'm curious about is that MWr TLP accompanies data, but isn't that data not used in DMA? Then, is the data of MWr TLP unnecessary?
I'm curious about the behavior in terms of packet.
