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Altera_Forum's avatar
Altera_Forum
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15 years ago

PCIe Completion Timeout

While the PCIe Hard IP is supportive to the application in discarding completions with »a tag that does not match an outstanding request« (PCIe UG 9.1 SP1, Table 4–36, ‘Unexpected Completion’), the application has to maintain completion timeout on its own (same table, ‘Completion timeout’).

The application will report a timeout event using cpl_err[0], but I see no way of notifying the Hard IP of the specific tag that is now invalidated so that the hard IP can correctly drop any late completions and re-allow new correct completions using this tag. And I assume this will not work any better if I add support for AER.

Suggestions, observations, explanations, someone?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    btw, while the CDMA example code does assert cpl_err[0] in altpcierd_cdma_app_icm.vhd, it does not touch the issue of complete recovery. This would include, not limited to, tag recycling for timeouts as well as graceful termination of outstanding requests in altpcierd_read_dma_requester.vhd and altpcierd_dma_descriptor.vhd.

    As far as I understand the PCIe Spec, a design may declare a completion timeout only as correctable by asserting cpl_err[0], if it is a Correctable Error. Quote from Clause 6.2.2.1.: […]If recovery action is

    indeed needed, the recovery agent must report the error as uncorrectable if the recovery agent decides not to attempt recovery.[…]

    Seeing CDMA is not attempting recovery, it should report the error by asserting cpl_err[1] instead of cpl_err[0], indicating an uncorrectable error.

    Additionally, I wonder why Altera did not implement recovery for Completion Timeouts as the code looks as if an attempt was made to fully implement PCIe.