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Altera_Forum
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17 years ago

PCI Express:Max_payload_size and lane width

i have design a X4 pcie endpoint device based on Quartus pci express ip V7.2. when i plug the device to the x16 pice slot of my dell optiplex 620 host, the device can only be recognized as an ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

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The 128B is typical limited of the root complex chipset. Check the motherboard chipset datasheet to confirm.

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it is mean that if the root complex only support max_payload_size of 128B ,then at the configure cycle, it will change the EP device's control register to set it's max_payload_size to 128B,right?