Altera_Forum
Honored Contributor
17 years agoOpenCore Plus and Signal Tap
Howdy!
I'm using an OpenCore Plus IP at the moment and would like to look at two signals in signal tap. My problem is that I am not allowed to open the signal tap window once the FPGA is programmed. Is this a common feature for all OpenCore blocks to hide information about the core? I can see the idea behind it but it's frustrating. Best Regards, Ola Bångdahl