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Honored Contributor
Honored ContributorNo output in simulation after connecting FIR and FFT using SOPC Builder
Hi, all, Sorry if I have posted in a wrong place. But I am really desperate now. Here is my problem: I am using Quartus II 9.0sp2. Now I am trying to connect FIR compiler to FFT using SOP...
Altera_ForumHonored Contributor
Honored ContributorHello! Daixiwen, Happy new year!
Sorry that I have to trouble you in the first day of 2010... I have built a new system which contains FFT, FIR, DC-FIFO and the Avalon-ST Bytes to Packets Converter Core as you suggested. In addition, I also had to inserted a Avalon ST Channel Adapter (suggested by an error message in SOPC builder). Indeed it seems that I don't have to manually assert the sop and eop signals since the the Bytes to Packets Converter has taken care of them; however, the simulation result was the same: there still existed the error signals "01" indicating the miss of source_sop signal (Please have a look at the simulation result in the attachment). I have also attached the look of my system inside SOPC builder. I will appreciate for any advice from you. Thank you so much for your patience! Best regards
