NIOS TSE initialize

The 88E1111 has a bug of reset, so You need to do a hardware reset for certain amount of time before initialization. E.g. do a running out 16bit counter.

Also did You add proper commands for RGMII initialization in Nios? Take the file from example projects. It's called tse_my_system.c afaik.

OriginallyI perfrom the hardware reset in the following way.

1. Pull the reset pin of phy low

2. sleep for 10 ms by usleep (10000) function

3. Push the reset pin of phy high

4. Initialize the phy

I change to the following but still not work

1. Pull the reset pin of phy low

2. sleep for 10 s by usleep (10000000)

3. Push the reset pin of phy high

4. sleep to 10 s by usleep (10000000)

5. Initialize the phy

The function eth_hw_rst is use to perfrom the hardware reset all those sleep and push reset pin high or low perform wihtin this function.

Then I call the function eth_phy_init to initialize my phy. Within this function I perform the following

1. Set the MDIO address by IOWR_ALTERA_TSEMAC_MDIO_ADDR0 (tse_mac.base, 0x12);

2. Change to RGMII mode by IOWR_ALTERA_TSEMAC_MDIO (tse_mac.base, 0x12, 0x1B, (tem_data | 0x0B));

3. Enable RGMII timing control by IOWR_ALTERA_TSEMAC_MDIO (tse_mac.base, 0x12, 0x14, tem_data);

4. Reset the physical device IOWR_ALTERA_TSEMAC_MDIO (tse_mac.base, 0x12, 0, (tem_data | PCS_CTL_sw_reset));

Then I initialize those TSE IP.

I am not sure whether there is any error in my initialize process. Please provide some advice.

BTW. I open the tse_my_system.c file it only the following command.

alt_tse_system_info tse_mac_device[MAXNETS] = {

TSE_SYSTEM_EXT_MEM_NO_SHARED_FIFO(ETHERNET_SUBSYSTEM_TSE_MAC, 0, ETHERNET_SUBSYSTEM_SGDMA_TX, ETHERNET_SUBSYSTEM_SGDMA_RX, TSE_PHY_AUTO_ADDRESS, &marvell_cfg_rgmii, ETHERNET_SUBSYSTEM_DESCRIPTOR_MEMORY)

Do you mean I need to add this command in my program flow.

But I do not use those inchestack also have not call those alt_tse_* function call

I try to create a new project with the simple socket server (rgmii) template. But I cannot download it to my development board for debug. I use the SOPC file gerneate from the Altera reference project tripple speed ethernet reference design (with proper I/O and device mapping).

I also try to trace those source code of this newly create project, but I cannot find any information on how to initialize my PHY.

Also the simple socket server use OS and inchestack, but I target not to use the OS also build our own stack. Although I will continue to trace the source code of the simple socket server (RGMII), I feel I still need a huge amount of effort to fix my issue.

So if any one can guide me on how to initialize the 88E1111 please provide some infomraiton for me to continue writing my code, testing and debuging.

Thx.

I finially can TX data from my development board to my PC but there is soomthing strange.

PC MAC address: 00-1B-21-51-D3-C8

Development MAC address : 02-03-04-05-06-07

The packet receive @PC view by sniffer

Destination MAC: 00-1B-21-51-D3-02

Source MAC: 03-04-05-06-07-07

All other data in the packet are correct.

The data buffer that SGDMA need to TX is

00 1B 21 51

D3 C8 02 03

04 05 06 07

....

The address of this buffer is 0x0004EC2C

One thing I am not sure is whether the address of my buffer is 32-bit allign. Or in other word, I would like to have more idea on how to check whether my data buffer is 32-bit align. Since SGDMA need to access data in 32-bit align format.

BTW. if anyone have idea on the strange condition of my source and destination MAC address. Please provide some advice to me.

Thx.

I enable packet alignment (as per the screen capture) in the IP setup wizard.

I also disable bothe TX and RX shift 16 in the program by the following function.

IOWR_ALTERA_TSEMAC_TX_CMD_STAT (tse_mac.base,

(result & (~ALTERA_TSEMAC_TX_CMD_STAT_TXSHIFT16_MSK)));

IOWR_ALTERA_TSEMAC_RX_CMD_STAT (tse_mac.base,

(result & (~ALTERA_TSEMAC_RX_CMD_STAT_RXSHIFT16_MSK)));

--- Quote Start ---

I also disable bothe TX and RX shift 16 in the program by the following function.

IOWR_ALTERA_TSEMAC_TX_CMD_STAT (tse_mac.base,

(result & (~ALTERA_TSEMAC_TX_CMD_STAT_TXSHIFT16_MSK)));

IOWR_ALTERA_TSEMAC_RX_CMD_STAT (tse_mac.base,

(result & (~ALTERA_TSEMAC_RX_CMD_STAT_RXSHIFT16_MSK)));

--- Quote End ---

You don't need these. Leave the code as is, without any modifications. It should work fine.

After comment out these two code the result is different (I consider this case is more worst than the origianl one).

The packet size I receive is only 76 bytes instead of 78 bytes (which is the total data size I intend to send from development board to PC).

The MAC address is as below:

Destination address: 21-51-d3-c8-02-03

Source address: 02-03-04-05-06-07

BTW. If I setup the configure register as the following. Is it true that the TSE will use the MAC address that I program into the TSE register with the location where contain the source MAC address at my original data buffer.

result = ALTERA_TSEMAC_CMD_TX_ENA_MSK |

ALTERA_TSEMAC_CMD_RX_ENA_MSK |

ALTERA_TSEMAC_CMD_RX_ERR_DISC_MSK |

ALTERA_TSEMAC_CMD_TX_ADDR_INS_MSK |

ALTERA_TSEMAC_CMD_RX_ERR_DISC_MSK;

IOWR_ALTERA_TSEMAC_CMD_CONFIG (tse_mac.base,

result);