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Altera_Forum
Honored Contributor
14 years agoNIOS TSE initialize
Dear All, I am new in NIOSII and TSE. I use the Altera developemnt DK-DEV-4CGX150N for project development. I use the Qsys to build up my system and want to write some code to make the develop...
Altera_Forum
Honored Contributor
14 years agoOriginallyI perfrom the hardware reset in the following way.
1. Pull the reset pin of phy low 2. sleep for 10 ms by usleep (10000) function 3. Push the reset pin of phy high 4. Initialize the phy I change to the following but still not work 1. Pull the reset pin of phy low 2. sleep for 10 s by usleep (10000000) 3. Push the reset pin of phy high 4. sleep to 10 s by usleep (10000000) 5. Initialize the phy The function eth_hw_rst is use to perfrom the hardware reset all those sleep and push reset pin high or low perform wihtin this function. Then I call the function eth_phy_init to initialize my phy. Within this function I perform the following 1. Set the MDIO address by IOWR_ALTERA_TSEMAC_MDIO_ADDR0 (tse_mac.base, 0x12); 2. Change to RGMII mode by IOWR_ALTERA_TSEMAC_MDIO (tse_mac.base, 0x12, 0x1B, (tem_data | 0x0B)); 3. Enable RGMII timing control by IOWR_ALTERA_TSEMAC_MDIO (tse_mac.base, 0x12, 0x14, tem_data); 4. Reset the physical device IOWR_ALTERA_TSEMAC_MDIO (tse_mac.base, 0x12, 0, (tem_data | PCS_CTL_sw_reset)); Then I initialize those TSE IP. I am not sure whether there is any error in my initialize process. Please provide some advice. BTW. I open the tse_my_system.c file it only the following command. alt_tse_system_info tse_mac_device[MAXNETS] = { TSE_SYSTEM_EXT_MEM_NO_SHARED_FIFO(ETHERNET_SUBSYSTEM_TSE_MAC, 0, ETHERNET_SUBSYSTEM_SGDMA_TX, ETHERNET_SUBSYSTEM_SGDMA_RX, TSE_PHY_AUTO_ADDRESS, &marvell_cfg_rgmii, ETHERNET_SUBSYSTEM_DESCRIPTOR_MEMORY) Do you mean I need to add this command in my program flow. But I do not use those inchestack also have not call those alt_tse_* function call