Occasional Contributor
Super ContributorMay I know which MCDMA example design that you are referring to ? Which UG?
Kindly help to clarify on this so that we are aligned.
The error is saying that ModelSim can't find this design unit. There could be something wrong with the instantiation of the "ctp_tile_encrypted" module in ctp_hssi_atoms.sv file. You may need to check on this.
Occasional Contributor@RichardTanSY_Altera , were you able to reproduce my error? I did see online that simulation for MCDMA P-Tile PCIe may only be supported by Modelsim SE, PE and Questa from Mentor. Could this be the issue? If so, will the new Questa Intel FPGA Edition Beta work? (I'm waiting on a license to try)
Thank you!
Occasional ContributorI just tried the new Questa Intel FPGA Edition. Same error:
# Start time: 14:30:55 on May 13,2021
# ** Note: (vsim-3812) Design is being optimized...
# ** Error: $MODEL_TECH/../intel/verilog/src/ctp_hssi_atoms.sv(39100): Module 'ctp_tile_encrypted' is not defined.
# For instance 'ctp_tile_encrypted_inst' at path 'pcie_ed_tb.pcie_ed_inst.dut.dut.ast.inst.inst.maib_and_tile.z1565a'
# ** Error: $MODEL_TECH/../intel/verilog/src/ctp_hssi_atoms.sv(39100): Module 'ctp_tile_encrypted' is not defined.
# For instance 'ctp_tile_encrypted_inst' at path 'pcie_ed_tb.dut_pcie_tb.dut_pcie_tb.g_bfm.p_dut_ep.altpcietb_bfm_top_rp.g_bfm.u1.rp.inst.dut.inst.inst.maib_and_tile.z1565a'
# Optimization failed
# ** Note: (vsim-12126) Error and warning message counts have been restored: Errors=2, Warnings=0.
# Error loading design
