JESD Test Bench Simulation - no activity
Hello
I am using Quartus Prime Pro 22.4.0 on Windows and Questa Intel Starter FPGA-64 2022.1 on Windows.
The full path to my project is:
c:/jesd
and the project name is also "jesd".
The JESD204B IP that I created is called "my_j" and so the testbench resides at default directory:
c:/jesd/my_j_tb
The generation of HDL and Test-Bench from within the IP Parameter Editor was OK.
Note that I have configured JESD to match my specific board requirements.
Within Questa I am changing to directory:
c:/jesd/my_j_tb/my_j_tb/sim/mentor
and sourcing msim_setup.tcl
This proceeds to compile and elaborate without any errors.
However, when I run the simulation, there is no activity on any signals with the except of clocks and resets.
What am I doing wrong?
Thank you for any answers.