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Altera_Forum's avatar
Altera_Forum
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15 years ago

Is "data valid" signal required for the clocked video input?

Hello. I'm a video newbie trying to use the clocked video input with a DE2-70 dev board from Terasic, which includes the ADV7180 video decoder chip. My current processing chain includes several other VIP blocks, ending with a clocked video output driving a VGA port.

The problem is that the ADV7180 doesn't have a "data valid" output signal, so I'm not sure what to do with the CVI's vid_data_valid_to_the_alt_vip_cti_0 input. I assume that signal is used to indicate blanking intervals, but I'm not sure why it's needed since I configured the CVI to use embedded sync codes. Do I need to derive my own data valid signal?

Just as an experiment, I have the signal tied high, but I'm not getting output on my monitor. There are probably problems with how I have the other VIP blocks configured, but before proceeding I wanted to check my

understanding of the "valid data" input to the CVI.

Any information would be appreciated!

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Somehow I missed the blurb in the documentation about vid_datavalid behaving "slightly differently" for embedded sync signals.

    It seems that the right thing to do would be to simply tie the signal high; is that correct? (Assuming that the ADV7180 delivers one sample per clock.)
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Data valid is used in cases that the video input has some times intervals with null data (not active data, not blanking data and not SAV or EAV, just stuffing).

    In the case of the ADV7180 it is not relevant and as you understand correctly just tie it to VCC.