Forum Discussion
Altera_Forum
Honored Contributor
16 years agoIs "data valid" signal required for the clocked video input?
Hello. I'm a video newbie trying to use the clocked video input with a DE2-70 dev board from Terasic, which includes the ADV7180 video decoder chip. My current processing chain includes several oth...
Altera_Forum
Honored Contributor
16 years agoSomehow I missed the blurb in the documentation about vid_datavalid behaving "slightly differently" for embedded sync signals.
It seems that the right thing to do would be to simply tie the signal high; is that correct? (Assuming that the ADV7180 delivers one sample per clock.)