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back-bencher's avatar
back-bencher
Icon for New Contributor rankNew Contributor
2 years ago
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IP upgradation error in QPP v 23.4 for altera_emif DDR4

I have instantiated above IP in QPP 20.1

I was trying to upgrade the project to QPP 23.4 by making a copy. I was directed to do IP upgrade

where I get an error: 

"Row address width" (MEM_DDR4_ROW_ADDR_WIDTH) 12 is out of range: 14, 15, 16, 17, 18

When the same IP is instantiated in QPP v 20.1, no such error is thrown, but this error in QPP v 23.4 does not let me compile the design.

What row address width should be selected in IP parameter editor?

Memory
  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    2 years ago

    Hello,


    Thank you for submitting your question in Intel Community.

    I'm Adzim, application engineer will assist you in this case.


    The Row address width of 12 is no longer available in current Quartus edition due to the memory longevity.

    Please select a value suitable for your memory component that available in the IP parameter editor.



    Regards,

    Adzim


5 Replies

  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hello,


    Thank you for submitting your question in Intel Community.

    I'm Adzim, application engineer will assist you in this case.


    The Row address width of 12 is no longer available in current Quartus edition due to the memory longevity.

    Please select a value suitable for your memory component that available in the IP parameter editor.



    Regards,

    Adzim


  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hello,


    I'm not receiving any feedback from you since my last reply.

    I wonder if your issue has been addressed.

    Please let me know if you have any further question in this thread.


    Regards,

    Adzim


    • back-bencher's avatar
      back-bencher
      Icon for New Contributor rankNew Contributor
      2 years ago

      Hello,

      Pardon for the late reply. Actually, I tried removing the IP from the project and again do the compilation. The compilation fails at the Plan stage. When I investigate, it is because of some other IP. Now I re-did the copy option and upgraded the IP before it produced the aforementioned error. While including the same IP, again the compilation fails at the Plan stage.

      Reason seems to be a register in some other IP, which is having synthesis attribute as follows:

      (* altera_attribute = {"-name MAX_FANOUT 1; -name ADV_NETLIST_OPT_ALLOWED ALWAYS_ALLOW"}*)

      I found the reason in the failure log of QPP.

  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hello,


    If the previous has been resolved, please kindly help to mark the solution for the initial issue that you are facing.

    For another issue that you are facing, please file another thread to discuss on the issue because we usually do not mix different issues in one thread.


    Thank you.


    Regards,

    Adzim