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Altera_Forum
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17 years ago

IP core optimization

Hi everyone,

How can I optimize any IP core for Altera FPGA technology? What kind of care needs to be taken when optimizing for particular FPGA technology or ASIC?

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    Thanks once again Brad! But I was really looking for something which can be done in HDL when designing any core. I guess it is huge area of concern which requires time and patience.