Altera_Forum
Honored Contributor
17 years agoIP core optimization
Hi everyone, How can I optimize any IP core for Altera FPGA technology? What kind of care needs to be taken when optimizing for particular FPGA technology or ASIC?
Thanks once again Brad! But I was really looking for something which can be done in HDL when designing any core. I guess it is huge area of concern which requires time and patience.