Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Input and Output while using Altera Simulink Blocks

Hi all;

I am new to Simulink and Altera blocks. Last couple days I have been working on simulating simple projects using simulink blocks. Now I started to use Altera blocks instead of simulink but I am having an Input/Output issue.

When I use constant source, i see the expected result at the output but if I use a signal generator my output is zero.

I have a screenshot but system doesnt let me post. :( But this is how I simply tested.

Simulink Constant -----> Altera Input ------>Altera Gain ---------> Altera Output -------> Simulink Scope

Simulink DSP SineWave ------->Altera Input ------>Altera Gain--------->Altera Output ------->Simulink Scope

What am I missing?

Thanks.

--

Ilker

12 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    How have you configured you Input and Output blocks?

    If your constant is outputting 0.5 and your Input is set to something like unsigned integer of width 8, then it would truncate your input to 0.

    Similarly with your Sine block, if your amplitude is too low it may be truncated.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Hi dabuk

    Thanks for your quick reply.

    I actually configured my input and output blocks to Signed Fractional [8].[8] and [17].[16] respectively. I thought it was Fixed or floating point option...
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    for constant

    input = 0.5 output becomes = 1 (gain set to 2)

    for sine wave

    amplitude max 10

    sampling time 1/1000
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    Here's my sample design as well as a picture of it.

    Seems to work ok for me.

    --- Quote End ---

    I still don't get the output right.

    But do I need to add Signal Compiler and Testbench to the project for simulation?

    We have a licence issue for now and I can not use that blocks.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    No you don't need the Signal Compiler and Testbench blocks to test your design.

    Have you tried using my design? Perhaps you should compare the configuration of the blocks to your blocks.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    --- Quote Start ---

    No you don't need the Signal Compiler and Testbench blocks to test your design.

    Have you tried using my design? Perhaps you should compare the configuration of the blocks to your blocks.

    --- Quote End ---

    Sorry about my very late reply. I had really busy couple days. I tried your design also. I attached the screenshot of my result. I really wonder if it is some kind of license related issue.....

    image_link (http://db.tt/rjmeuawg)