How to use the SDC file provided by the Megawizard plugin manager in my project

Hi,

I am new to Altera and first time using the Quartus tools for my project.

I am using triple speed RGMII ethernet MAC generated using Megawizard plugin manager

I instantiated the MAC some level down the project hierarchy. The Megawizard also provided a .sdc file which I included in my quartus project.

But when I perform timing analysis using the timequest timing analyzer, it shows warnings as mentioned below.

Warning: Ignored assignment: create_clock -name {altera_tse_ff_tx_clk_} -period 10.000 -waveform { 0.000 5.000 } [get_ports {ff_tx_clk}]

I understood from the above warning that the port name referred is the port name declared in that MAC module. But I have connected it to my clock source.

The question here is how to use the provided SDC file to constrain the instantiated core.

Thanks in advance,

Santhosh.