Forum Discussion
Altera_Forum
Honored Contributor
8 years agoThe intention of the auto generated rootport testbench is the simulation the PCIe Hard IP by connecting to the APPS components, the testbench only covers the .qsys example design under <install_dir>/ip/altera/altera_pcie/altera_pcie_<dev>_ed/example_design/, it doesn't covers the simulation of whole design environment such as when users add in their own application components.