Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThanks again Std_logic!
As you suggested, without any prefix editing, I have used the default variation_pin_assignment.tcl to compile my project, which instantiated a ddr_hp_controller twice with a_mem and b_mem interfaces. The compiling has been through without error message . But when I looked at that "variation_phy_autodetectedpins.tcl" , only the pins for a_mem port are listed. Why my b_mem port pins are not there? Is the b port really connected? I am confused. Your input is most appreciated. Thanks!