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Altera_Forum
Honored Contributor
Honored ContributorHow to implement PCI Express into my project.
Hello,
I have created the PCIe project according to example mentioned in PCI Express Compiler User Guide(2nd chapter). After compilation, pin assignment and programming the StratixIIGX my PC can recognize the device[1]. But i cant find any reference how to implement that PCIe project into my own. For example, my project has the output pins that carry the data that i need to transfer to PC trough PCIe. How can i connect them to the previously created project mentioned above[1]. I tried to make one project that is attached here. But it doest work. PC doesn't see the Device. Any suggestions are highly appreciated. Best regards, Igor.16 Replies
Altera_ForumIn the pex_example_top you can find altpcierd_master entity which is responsible for DMA. There is a memory implemented there - altsyncram - You can send/receive data through datain and dataout signals in the altpcierd_master entity.
Please send your updates. Igga- Altera_Forum
Hi Igga,
Thanks for your update. --- Quote Start --- In the pex_example_top you can find altpcierd_master entity which is responsible for DMA. --- Quote End --- - <variation name>_example_top.v for Simple DMA doesn't appear to have such entity. Nevertheless, I suppose under - --- Quote Start --- datain and dataout signals --- Quote End --- - you were referring to rx_inN and tx_outN signals - correct me if I'm wrong. In addition, what tools do you use to verify sent and received data? I believe the entity you referring to (altpcierd_master) is actually located in altpcierd_example_app.v Kind regards, Maxim. - Altera_Forum
Hi friend,
It seems that we are using different examples. Im using the example created by megacore wizard, like it was described in the PCIE Compiler User Guide. The second thing is that im using Quartus v6.0 with PCIE compiler 2.1.0. In that example you can use access either DMA or target memory writing or reading from altsyncram RAM memory. To verify the data im using the application program supplied with the development kit (Application GUI). I can attach my project shortly if necessary. Igor. - Altera_Forum
Hi Igor,
Yes, we do use different designs - I'm using Quartus v 7.2 and PCIe Compiler v 7.2. Thus the designs are different. If it does not bother you much, can you still attach your project so we can have a look? It might give us some clues. Thanks in advance, Maxim. - Altera_Forum
Hi buddy,
Sorry for the late reply. My license for the Quartus has expired and i was waiting for the new one. Im attaching my simple project. You can see the one single value was assigned to datain signal. It is the simplest way to feed the data from FPGA to PC(use dataout to transmit the data from PC to FPGA). You can use Application GUI to check it. Take care, Igor - Altera_Forum
Hi,
Another option is to look at the constraints of a working design such as: http://www.altera.com/support/refdesigns/ip/interface/ref-pciexpress-hp.html This example contains a .qar file for the Stratix II GX Altera board and a basic Windows-XP software application which works with the provided .sof file. Good luck. Lili Bebcnofne
