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Altera_Forum's avatar
Altera_Forum
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16 years ago

How to gracefully terminate the PCIe read request

I am using Stratix4 hardip in pcie gen1 x4 configuration. The hard IP has PCI bar register configured for 512K memory space. The Root complex is sending out the memory read request (non-posted) to ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Okay, that one is old but easy to answer. From PCIe:

--- Quote Start ---

If the Request is not a Message, and is a supported Type, specific implementations may be optimized based on a defined programming model which ensures that certain types of (otherwise legal) Requests will never occur. Such implementations may take advantage of the following rule:

– If the Request violates the programming model of the device Function, the Function may optionally treat the Request as a Completer Abort, instead of handling the Request normally

• If the Request is treated as a Completer Abort, this is a reported error associated with the Function (see Section 6.2)

• If the Request requires Completion, a Completion Status of CA is returned (see Section 2.2.9)

--- Quote End ---

So, in short: You can treat the device’s restrictions as a limited programming model, and violating that is allowed to be responded by a Completer Abort (CA).