Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThanks Kevin,
I will try the frame locking. Also, what would be the most efficient clock for the scaler block in this case? Could it be from the incoming 148.5 as well or is it better to decouple and use a fixed clock from an unrelated PLL (or from the sysclk that the frame buffer generates) as long as it's greater than 148.5.