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11 years agoFIR compiler MegaCore function
Hi All,
I was using DSP Builder to generate a FIR Compiler block in a model. After clicking Step 2: Generate in IP Toolbench, I got error messages: MegaCore function Generation Error IP Functional Simulation Model Creation Failed Error: Quartus II 64-bit Analysis & Synthesis was unsuccessful Any solution/idea to fix the error is welcome. The softwares I used: Quartus II 64-bit 13.1 Web Edition DSP Builder 13.1 Matlab & Simulink 2012a I don't have a paid license for Quartus and DSP Builder, yet Many Thanks, Lee