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Altera_Forum
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11 years ago

FIR compiler MegaCore function

Hi All, I was using DSP Builder to generate a FIR Compiler block in a model. After clicking Step 2: Generate in IP Toolbench, I got error messages: MegaCore function Generation Error IP ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi All,

I fixed the issue. I changed the device from Stratix III to Cyclone III. This is because the web edition does not support Stratix III.

Lee