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Altera_Forum
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16 years ago

FIR compiler & DSP blocks

This is a bit Off-topic but, When I use the FIR compiler to produce a simple FIR, single rate, 64 coeffs, 14 bit samples, 16 bit coeffs, either single channel or two channel, the compiler doesn...
Altera_Forum's avatar
Altera_Forum
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16 years ago

fully parallel should create constant coefficient multipliers, which when implemented in LEs can be pretty efficient.

try Variable/Fixed Coefficient: Multi-Cycle to get it to use some DSP blocks. the LE savings may not be as dramatic as you'd like to see.

you might try FIR Compiler II to compare resource usage and fmax. or you might write your own FIR.