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fa_fpga_enthusiast's avatar
fa_fpga_enthusiast
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2 years ago

Exploring why GSFI IP Core repeats sending command and address for each 4-byte data in Page Program

Dear Intel Support Team, We're working on two projects to communicate with Micron Flash Memory. The first one called the SPI project, uses the SPI 4-wire IP core and SPI driver. In the second proj...
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fa_fpga_enthusiast's avatar
fa_fpga_enthusiast
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hello,

We incorporate the GSFI IP Core using the platform designer, and in our embedded software, we're utilizing the intel_gsfi_write_block() function from the HAL driver. Simulation results validate the claim specified in the following URL: [https://community.intel.com/t5/FPGA-Intellectual-Property/Generic-Serial-Flash-Interface-Intel-FPGA-IP-Page-program-burst/td-p/1205777].

We haven't conducted low-level verification for the burst count as it's not part of our current plan.

Thanks.