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Altera_Forum's avatar
Altera_Forum
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16 years ago

DSP Builder Diagram

Hello everyone,

Somebody can helpme to understand the diagram that I attached, I was simulating the diagram in the coutinuos time and the results is good, but I dont understand the results obtained with the diagram with Altera Blocks.

Please if you have any little comments, please make it.

Thankyou for check my problem ...

Jjeshua

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi, You have first convert your continuous model to z-domain (discrete model) and then convert your new model to canonical form. You can get information from the following reference:

    Gene F. Franklin, J.David Powell and Michael L. Workman, digital control of dynamic systems, 1998.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Hi lok,

    Thank you!!! I will check the reference, but do think that the model in the Altera Block should be modified to be the same in the continuos time? sorry but i dont know, is my first time usng FPGA.

    Thank you

    Jjeshua