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Altera_Forum
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16 years ago

DSP Builder Diagram

Hello everyone, Somebody can helpme to understand the diagram that I attached, I was simulating the diagram in the coutinuos time and the results is good, but I dont understand the results obta...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Hi lok,

Thank you!!! I will check the reference, but do think that the model in the Altera Block should be modified to be the same in the continuos time? sorry but i dont know, is my first time usng FPGA.

Thank you

Jjeshua