DMA and PCIe

In the SOPC system ,I don not know whether the DMA counld be contolled by PCIe 。 in pci user guid ，there is a exsample as your design ,but they are pci,

onchipmen and dma .

Hi,

Thanks for the reply. I finally got it to work when I changed my offsets to

64-bits instead of regular 32-bit. So I incremented the control reg offsets by 8, instead of 4. I have a heterogeneous system, with 64-bit data width for DDR2 and 32-bit for the PCIe. Altera's DMA manual talks about different data widths, although it doesn't directly mention how it (different data widths) affects the control registers' offsets.

I can now prime the read/write addresses, length and initiate a transfer. I can see the DDR2 being read (SignalTap-II) and the status returned as 0x11 - meaning 'done' and 'length is zero'.

However, my now PCIe destination doesn't seem to be getting the data. I think my avalon-to-PCIe address translation may be incorrect.

regards,

Hi SWguy,

Even i am trying the same, to move data from host to ddr. Can you post your code. Did you implement using DMA APIs or by accessing registers?

Thanks,

Amogha

Hi,

We're not using Nios for DMA at the moment, so no DMA API (if that's what you're asking) and DMA registers are directly accessed by the host. The host talks to PCIe BARs (and thru BARs to DMA) by invoking a custom driver for RTX - a real-time extension of windows.

The writeaddress for DMA in SOPC must be actual physical addr on the RTX driver (not virtual addr) and must be contiguous. Usually there are APIs at driver-level to do this and you may not have to do it yourself. Depending on the non-paged pool size of your windows host, you may not be able to get 1:1 mapping of the entire DDR2 on you PCIe endpoint (on SOPC) and the host's memory. So multiple DMA xfers may be necessary between DDR2 and host.

Look for "Avalon-MM-to-PCI Express Address Translation" in PCI Express Compiler User Guide to understand how xlation process works.

Hope this helps,

-swguy

Thanks for the explaination.

But i need to use NIOS in my design. I was able to do the data transfer between host and ddr (like small data - 2k, 4k) but without using DMA.

Now I am trying to use DMA to transfer data between host and ddr. I am stuck here from a while. Can you help me?

Hi,

Since we're not using Nios API (for DMA) in our design, there is little I can help you with in that area. Check Nios forum or wiki.

best,

-swguy