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Honored ContributorDesign IP Core of SPI
I 'm a student, I have a excercise " Design IP Core of SPI", so I begin learing Verilog for it. So, I don't know about SPI block diagram, interface, timing ... Have anyboy can help me ? And give me some advices !
Thanks & thank !!!3 Replies
Altera_Forumhttp://en.wikipedia.org/wiki/serial_peripheral_interface_bus
Have fun. Jake- Altera_Forum
128M SPI flash model in Verilog... This one should be helpful.
http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/7CE3021F57B8EA4848257412002E26CC/$File/MX25L12805D.v - Altera_Forum
Thanks for help !!!
