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Altera_Forum
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16 years ago

Decimatio FIR filter in FPGA

Hi, I was required to build a decimation filter using FIR filter (CIC filter cannot be used). I used FIR compiler to implement the decimation filter. The sampling frequency of ADC is 120 MHz, and I n...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I have checked the mixer, and it works well. I also use the single tone for test and have the same problem. Yes, I use I and Q to have a complex signal at baseband.

The following attachments are the responses of two decimation FIR filters. I exports the coefficients of the filters and plot the spectrum using MATLAB. The figures seem to show that the filter work well. I also simulate input signal in MATLAB to see the results. It has no problem. But the implementation in FPGA will give me such wired results. I have no idea about this issue.