Forum Discussion
Hi @Sijith,
Thank you for your reply.
Since you mentioned that the design that gives error after adding the Signal Tap is the "original PCIE DMA transfer example design (without any modification)" in (2.) in the email from the previous forum thread, therefore I kindly requested that you attach the design (including the Signal Tap) for me to duplicate it at my end.
However, given your clarification that the design which gives error after adding the Signal Tap is actually the design with DMA example design with FIFO and counter, could you please attach the stp file? With that, I can add the stp to the design ( PCIE_DDR4_mod.zip) and reproduce the error for further investigation.
In the meantime, could you please also try the suggestion from my previous reply?
Thanks.
Best Regards,
VenTingT