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Altera_Forum
Honored Contributor
16 years agoDDR HP Controller with Bursts
Hello All, Having an application with NIOSII, DDR HP Controller and others, all are running the same ddr_sysclk at 133MHz. Using Quartus8.1, CycloneIII and the basic application works with sin...
Altera_Forum
Honored Contributor
16 years agoThe NIOS will only perform bursting when
1 - Bursting is enabled on its bus masters 2 - Data access is performed via the cache. The pipeline bridge will only add latency. If you don't need it to meet timing requirements, remove it. Jake